Animated Demo of Working of 74HC4017, Johnson Counter with Circuit Diagram

              74HC4017 / 74HCT4017 is a commonly used 5-stage Johnson Decade counter IC. It has 10 decoded outputs ( Q0-Q9 ), an output from most significant flip-flop ( Qbar5-9 ), two clock inputs ( CP0 and CP1bar ) and a master reset ( MR ) input. 5V for the operation of 74HC4017 / 74HCT4017 is given from a 5V voltage regulator. Pinout diagram of  74HC4017 / 74HCT4017 is given below.

Features of 74HC4017 / 74HCT4017

1. Wide supply voltage range from 2V - 6V
2. Input levels of 74HC4017 / 74HCT4017
    For 74HC4017    -  CMOS level.
    For 74HCT4017  -  TTL level.

        A HIGH on MR will reset the counter ( Q0 = HIGH, Qbar5-9 = HIGH, Q1-Q9 = LOW ). Counter can be operated in two modes.

1. Counts in positive transition of clock pulse.
2. Counts in negative transition of clock pulse.

Circuit for counter that counts in positive transition of clock pulse

          Circuit diagram for a counter that counts in positive transition of CP0 is given below. From the circuit it is clear that, MR and CP1 should be LOW. Clock pulse is given to CP0 through a push button switch.

          Push button switch will be in off state by default. When push button switch is off, 5V will reach CP0 through a pull up resistor of 1K. This will give HIGH voltage to CP0. When the switch is pressed, switch will turn on and CP0 get grounded through the push button switch. This is a transition of CP0 from HIGH to LOW ( Negative transition ). But this circuit will increment counter in positive transition of clock pulse only. When the press is released, CP0 will change from LOW to HIGH again. This is a positive transition of CP0 and counter will increment the count in this transition.

          If the pull up resistor is not connected, when the push button switch is pressed, power supply get shorted through the push button switch. Due to low resistance of this path, high current will flow through this path, which may damage the power supply.



Circuit for counter that counts in negative transition of clock pulse

        We have already seen the circuit that counts in positive transition of clock pulse. Next is the circuit that counts in negative transition of the clock pulse. In this circuit CP0 is connected to 5V and MR is connected to Ground. Clock pulse is given to CP1 through a push button switch.

        CP1 is connected to 5V through a 1K pull up resistor. CP1 is also connected to ground through a push button switch. When the switch is off, CP1 will get HIGH voltage through a 1K pull up resistor. In this circuit, counter will increment during the negative transition of CP1. When switch is pressed, CP1 get connected to ground. This is a transition of CP1 from HIGH to LOW ( Negative transition ). During negative transition, counter will increment the count. When the press is released, a transition from LOW to HIGH ( Positive Transition ) will occur during which no change in counter will take place.

          If the pull up resistor is not connected, when the push button switch is pressed, power supply get shorted through the push button switch. Due to low resistance of this path, high current will flow through this path, which may damage the power supply.

        Output of the counter can be obtained from the LEDs connected to Q0 - Q9 and Qbar5-9. Qbar5-9 can be used to drive the CP0 input of next counter. Qbar5-9 will be HIGH, if  any of Q0, Q1, Q2, Q3 or Q4 is HIGH and Qbar5-9 will be LOW, if  any of Q5, Q6, Q7, Q8 or Q9 is HIGH.